Hybrid integrated circuit electromagnetic compatibility solutions

In this paper, from the point of view of improving the EMC of the system, combined with the characteristics of the hybrid integrated circuit process, proposed in the hybrid integrated circuit design should pay attention to the problems and take specific measures. Hybrid integrated circuit (Hybrid Integrated Circuit) is an integrated circuit made by the combination of semiconductor integration process and thick (thin) film process. Hybrid integrated circuit is in the substrate with a film method to produce thick or thin film components and their interconnect lines, and in the same substrate will be discrete semiconductor chips, monolithic integrated circuits or micro-components mixed assembly, and then add packaging. It is characterized by high assembly density, high reliability and good electrical performance.
Electromagnetic compatibility principle
Electromagnetic compatibility refers to the ability of electronic devices and power supplies to work normally and reliably in a certain electromagnetic interference environment, and also the ability of electronic devices and power supplies to limit their own electromagnetic interference and avoid interference with other electronic devices around them.
The occurrence of any electromagnetic interference must have three basic conditions: first of all, to have the source of interference, that is, the generation of harmful electromagnetic field devices or equipment; secondly, to have a way to spread interference, usually considered to have two ways: the way of conduction coupling and radiation coupling, the third is to have sensitive equipment susceptible to interference.
Therefore, to solve the problem of electromagnetic compatibility should be for the three elements of electromagnetic interference, one by one to solve: reduce the intensity of interference occurring components; cut off the propagation path of interference; reduce the sensitivity of the system to interference.
Mixed integrated circuit design in the presence of electromagnetic interference are: conducted interference, crosstalk interference and radiation interference.
In solving the EMI problem, the first should determine the coupling path of the emission source is conducted, radiated, or crosstalk. If a high amplitude transient current or rapidly rising voltage appears near the conductor containing the signal, the main problem of electromagnetic interference is crosstalk. If there is a complete circuit connection between the source of interference and the sensitive device, it is conducted interference. In contrast, radiated interference occurs between two parallel conductors that transmit high-frequency signals.
Electromagnetic compatibility design
In the hybrid integrated circuit EMC design, the first thing to do is functional testing, in the program has been determined in the circuit to test the EMC indicators to meet the requirements, if not to meet the parameters to modify the indicators, such as transmit power, operating frequency, re-selection of devices, etc.. The second is to do protective design, including filtering, shielding, grounding and lap design, etc.. The third is to do the adjustment of the layout of the design, including the overall layout of the test, components and wire layout test. Usually, the EMC design of the circuit includes: the selection of processes and components, circuit layout and the layout of wires, etc. Process and component selection
There are three manufacturing processes available for hybrid integrated circuits: single-layer thin film, multilayer thick film, and multilayer co-fired thick film. The thin-film process can produce the small size, low power and high current density components required for high-density hybrid circuits, with high quality, stability, reliability and flexibility, suitable for high-speed, high-frequency and high packaging density circuits. However, only single-layer wiring can be done and the cost is high.
The multilayer thick film process can manufacture multilayer interconnect circuits at a lower cost. From the perspective of electromagnetic compatibility, multilayer wiring can reduce the electromagnetic radiation of the circuit board and improve the immunity of the board. The distance between signal and ground is only between layers, because special power and ground layers can be set up. In this way, the circuit area of all signals on the board can be reduced to a minimum, thus effectively reducing the differential mode radiation.
The multilayer co-firing thick film process has more advantages and is currently the mainstream technology for passive integration. It can realize more layers of wiring, easy to embed components, improve the assembly density, with good high frequency characteristics and high-speed transmission characteristics. In addition, with good compatibility with thin-film technology, the combination of the two can achieve higher assembly density and better performance of hybrid multilayer circuits.
The active devices in the hybrid circuit are generally selected from bare chips, and when there is no bare chip, the corresponding packaged chip can be used. When choosing a chip to meet the technical specifications of the product, try to use a low-speed clock. The capacitor should have low equivalent series resistance, which can avoid large attenuation of the signal.
The packaging of the hybrid circuit can be used to cut the metal base and shell cover, parallel seam welding, with good shielding effect.
Layout of the circuit
In the layout of the hybrid microcircuit division, the first three main factors to consider: the number of input / output pins, device density and power consumption. A practical rule is that the area occupied by chip components for the substrate of 20%, per square inch of power dissipation is not more than 2W.
In principle, the arrangement of devices should be related to each other as close as possible, the digital circuit, analog circuit and power circuit are placed separately, the high-frequency circuit and low-frequency circuit are separated. Easy to generate noise devices, small-current circuits, high-current circuits, etc. should be as far away as possible from the logic circuit. Clock circuits and high-frequency circuits and other major sources of interference and radiation should be arranged separately, away from sensitive circuits. Input and output chips should be located close to the I/O outlet of the hybrid circuit package.
High-frequency components as short as possible to reduce the distribution of parameters and electromagnetic interference between each other, susceptible to interference components can not be too close to each other, input and output as far away as possible. Oscillator as close as possible to the location of the clock chip, and away from the signal interface and low-level signal chip.
Components should be parallel or perpendicular to the side of the substrate, as far as possible, so that components are arranged in parallel, which will not only reduce the distribution parameters between components, but also in line with the manufacturing process of hybrid circuits, easy to produce.
In the hybrid circuit substrate power and grounding pads should be symmetrically arranged, preferably evenly distributed many power and grounding I/O connections. The bare chip mounting area is connected to the most negative potential plane.
In the selection of multilayer hybrid circuit, the board’s interlayer arrangement with the specific circuit changes, but generally has the following characteristics.
(1) wiring layer should be arranged as far as possible with the power supply or ground plane adjacent to produce flux to eliminate the effect.
(2) power supply and ground layer is allocated in the inner layer, can be regarded as a shielding layer, can be a good way to suppress the common mode RF interference inherent on the board, reduce the distribution impedance of high-frequency power.
(3) the board power plane and ground plane as close as possible to each other, the general ground plane above the power plane, so that you can use the interlayer capacitance as a power supply smoothing capacitance, while the ground plane on the power plane distribution of radiation current to play a shielding role.
The layout of the conductors
In circuit design, often focus on improving wiring density, or the pursuit of uniform layout, ignoring the impact of line layout on the prevention of interference, so that a large number of signals radiated into space to form interference, which may lead to more electromagnetic compatibility problems. Therefore, good wiring is the key to determine the success of the design.
Layout of ground
The ground line is not only a potential reference point for circuit work, but also serves as a low-impedance circuit for signals. The more common interference on the ground line is the ground loop interference caused by the ground loop current. Solve this type of interference problem, it is the same as solving most of the EMC problems.
The noise on the ground line mainly affects the ground level of the digital circuit, and the digital circuit output low level, the noise on the ground line is more sensitive. Interference on the ground line may not only cause circuit malfunction, but also cause conduction and radiation emission. Therefore, the focus of reducing these interferences is to reduce the impedance of the ground as much as possible (for digital circuits, reduce the ground inductance is particularly important).
The layout of the ground line should pay attention to the following points:
(1) when the board is equipped with multiple chips, the ground line will be a large potential difference, the ground line should be designed as a closed loop to improve the noise tolerance of the circuit.
(2) both analog and digital functions of the board, analog and digital ground is usually separated, only connected at the power supply.
(3) According to the different supply voltages, digital and analog circuits are set up separately.
(4) common ground as thick as possible. In the use of multi-layer thick film process, the ground surface can be set up specifically, which helps reduce the loop area, but also reduces the efficiency of the receiving antenna. And can be used as a shield for the signal line.
(5) should avoid comb ground, this structure makes the signal return loop is very large, will increase the radiation and sensitivity, and the common impedance between the chips may also cause the circuit misoperation.
The layout of the power line
Generally speaking, in addition to the interference caused directly by electromagnetic radiation, the most common electromagnetic interference caused by the power line. Therefore, the layout of the power supply line is also very important, usually should comply with the following rules.
(1) chip power pins and ground pins should be decoupled between. The decoupling capacitor is 0.01uF chip capacitor, should be installed close to the chip, so that the circuit area of the decoupling capacitor is as small as possible.
(2) When choosing chip, try to use the chip with power supply pins and ground pins as close as possible, which can further reduce the power supply circuit area of the decoupling capacitor and help to realize electromagnetic compatibility.
(3) power supply l
ine as close as possible to the ground to reduce the power supply loop area, the differential mode radiation is small, helping to reduce the circuit cross-talk. Different power supply loops do not overlap each other.